Workaround ++gfCacheP into postincrement ld r22, Z+
TODO: ideally improve the automaton to work with postincrement only, at least in this case.
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@ -74,10 +74,12 @@ void __attribute__((noinline)) SdFile::gfUpdateCurrentPosition(uint16_t inc){
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#define find_endl(resultP, startP) \
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__asm__ __volatile__ ( \
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"adiw r30, 1 \n" /* workaround the ++gfCacheP into post increment Z+ */ \
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"cycle: \n" \
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"ld r22, Z+ \n" \
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"cpi r22, 0x0A \n" \
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"brne cycle \n" \
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"sbiw r30, 1 \n" /* workaround the ++gfCacheP into post increment Z+ */ \
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: "=z" (resultP) /* result of the ASM code - in our case the Z register (R30:R31) */ \
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: "z" (startP) /* input of the ASM code - in our case the Z register as well (R30:R31) */ \
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: "r22" /* modifying register R22 - so that the compiler knows */ \
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