ARM: implement SET_INPUT() and READ().

Tested and found to work. Excellent.

Test code before main():

static void delay(uint32_t delay) {
  while (delay) {
    __ASM volatile ("nop");
    delay--;
  }
}

Test code in main():

  SET_INPUT(PIO0_1);
  SET_INPUT(PIO0_2);
  SET_INPUT(PIO0_3);
  SET_INPUT(PIO0_4);

  delay(5000000);
  while (1) {
    sersendf_P(PSTR("\nPIO0_1  PIO"));
    delay(100000);
    sersendf_P(PSTR("0_2  PIO0_3"));
    delay(100000);
    sersendf_P(PSTR("  PIO0_4\n"));
    delay(100000);
    sersendf_P(PSTR("  %sx"), READ(PIO0_1));
    delay(100000);
    sersendf_P(PSTR("    %sx"), READ(PIO0_2));
    delay(100000);
    sersendf_P(PSTR("    %sx"), READ(PIO0_3));
    delay(100000);
    // PIO0_4 works, but the chip doesn't allow to set a pullup.
    sersendf_P(PSTR("    %sx\n"), READ(PIO0_4));
    delay(5000000);
  }

pinio.h

@@ -56,6 +56,8 @@
     See chapter 12 in the LPC111x User Manual. A read-modify-write cycle like
     on AVR costs 5 clock cycles, this implementation works with 3 clock cycles.
   */
+  /// Read a pin.
+  #define _READ(IO)        (IO ## _PORT->MASKED_ACCESS[MASK(IO ## _PIN)])
   /// Write to a pin.
   #define _WRITE(IO, v) \
     do { \
@@ -69,6 +71,12 @@
     GPIO behavior. Peripherals using these pins may have to change this and
     should do so in their own context.
   */
+  /// Set pin as input.
+  #define _SET_INPUT(IO) \
+    do { \
+      LPC_IOCON->IO ## _CMSIS = (IO ## _OUTPUT | IO_MODEMASK_REPEATER); \
+      IO ## _PORT->DIR &= ~MASK(IO ## _PIN); \
+    } while (0)
   /// Set pin as output.
   #define _SET_OUTPUT(IO) \
     do { \