Apply ATOMIC macros in a number of other obvious places.
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69da7c5b15
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9
clock.c
9
clock.c
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@ -27,12 +27,9 @@ static void clock_250ms(void) {
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power_off();
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}
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else {
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uint8_t save_reg = SREG;
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cli();
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CLI_SEI_BUG_MEMORY_BARRIER();
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psu_timeout++;
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MEMORY_BARRIER();
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SREG = save_reg;
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ATOMIC_START
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psu_timeout++;
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ATOMIC_END
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}
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}
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40
dda_queue.c
40
dda_queue.c
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@ -113,18 +113,15 @@ void enqueue_home(TARGET *t, uint8_t endstop_check, uint8_t endstop_stop_cond) {
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// make certain all writes to global memory
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// are flushed before modifying mb_head.
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MEMORY_BARRIER();
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mb_head = h;
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uint8_t save_reg = SREG;
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cli();
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CLI_SEI_BUG_MEMORY_BARRIER();
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uint8_t isdead = (movebuffer[mb_tail].live == 0);
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MEMORY_BARRIER();
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SREG = save_reg;
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mb_head = h;
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uint8_t isdead;
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ATOMIC_START
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isdead = (movebuffer[mb_tail].live == 0);
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ATOMIC_END
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if (isdead) {
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next_move();
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// Compensate for the cli() in setTimer().
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@ -173,19 +170,16 @@ void queue_flush() {
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// Since the timer interrupt is disabled before this function
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// is called it is not strictly necessary to write the variables
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// inside an interrupt disabled block...
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uint8_t save_reg = SREG;
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cli();
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CLI_SEI_BUG_MEMORY_BARRIER();
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// flush queue
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mb_tail = mb_head;
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movebuffer[mb_head].live = 0;
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ATOMIC_START
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// disable timer
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setTimer(0);
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MEMORY_BARRIER();
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SREG = save_reg;
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// flush queue
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mb_tail = mb_head;
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movebuffer[mb_head].live = 0;
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// disable timer
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setTimer(0);
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ATOMIC_END
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}
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/// wait for queue to empty
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