Move interrupt busy detection from dda_clock() to clock tick ISR.
The reason is, interrupts can't be re-entered on ARM, so we need a different mechanism.
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11
dda.c
11
dda.c
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@ -749,7 +749,6 @@ void dda_step(DDA *dda) {
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accurate curves!
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accurate curves!
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*/
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*/
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void dda_clock() {
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void dda_clock() {
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static volatile uint8_t busy = 0;
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DDA *dda;
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DDA *dda;
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static DDA *last_dda = NULL;
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static DDA *last_dda = NULL;
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uint8_t endstop_trigger = 0;
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uint8_t endstop_trigger = 0;
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@ -769,13 +768,6 @@ void dda_clock() {
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if (dda == NULL)
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if (dda == NULL)
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return;
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return;
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// Lengthy calculations ahead!
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// Make sure we didn't re-enter, then allow nested interrupts.
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if (busy)
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return;
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busy = 1;
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sei();
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// Caution: we mangle step counters here without locking interrupts. This
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// Caution: we mangle step counters here without locking interrupts. This
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// means, we trust dda isn't changed behind our back, which could
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// means, we trust dda isn't changed behind our back, which could
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// in principle (but rarely) happen if endstops are checked not as
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// in principle (but rarely) happen if endstops are checked not as
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@ -923,9 +915,6 @@ void dda_clock() {
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ATOMIC_END
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ATOMIC_END
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}
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}
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#endif
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#endif
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cli(); // Compensate sei() above.
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busy = 0;
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}
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}
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/// update global current_position struct
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/// update global current_position struct
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16
timer-avr.c
16
timer-avr.c
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@ -41,11 +41,25 @@ uint32_t step_extra_time = 0;
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Comparator B is the system clock, happens every TICK_TIME.
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Comparator B is the system clock, happens every TICK_TIME.
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*/
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*/
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ISR(TIMER1_COMPB_vect) {
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ISR(TIMER1_COMPB_vect) {
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static volatile uint8_t busy = 0;
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// set output compare register to the next clock tick
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// set output compare register to the next clock tick
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OCR1B = (OCR1B + TICK_TIME) & 0xFFFF;
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OCR1B = (OCR1B + TICK_TIME) & 0xFFFF;
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clock_tick();
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clock_tick();
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dda_clock();
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/**
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Lengthy calculations ahead! Make sure we didn't re-enter, then allow
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nested interrupts.
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*/
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if ( ! busy) {
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busy = 1;
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sei();
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dda_clock();
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busy = 0;
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}
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}
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}
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#ifdef MOTHERBOARD
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#ifdef MOTHERBOARD
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