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stm32: correct some clock settings

This commit is contained in:
Nico Tonnhofer 2017-07-25 20:15:12 +02:00
parent b62bad1b0a
commit 7581c0038d
3 changed files with 12 additions and 9 deletions
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9
arduino_stm32f411.h
View File

@ -33,8 +33,13 @@
*/
#define F_CPU __SYSTEM_CLOCK
#define PPRE1_DIV (RCC_CFGR_PPRE1_DIV2) // 0x1000
#define PPRE2_DIV (RCC_CFGR_PPRE2_DIV1) // 0x0000
#if defined STM32F411xE
#define PPRE1_DIV (RCC_CFGR_PPRE1_DIV2)
#define PPRE2_DIV (RCC_CFGR_PPRE2_DIV1)
#elif defined STM32F446xx
#define PPRE1_DIV (RCC_CFGR_PPRE1_DIV4)
#define PPRE2_DIV (RCC_CFGR_PPRE2_DIV2)
#endif
#if PPRE1_DIV > 0
#define APB1_DIV (1 << ((PPRE1_DIV >> 10) - 3))

4
cmsis-system_stm32f4xx.c
View File

@ -325,7 +325,7 @@ void SetSysClock(void)
#define LATENCY FLASH_ACR_LATENCY_2WS
#elif __SYSTEM_CLOCK == 180000000
#if !defined(STM32F446xx)
#warning You are running the controller out of specification! 180 MHz!
#error You are running the controller out of specification! 180 MHz!
#endif
#define PLLM 4
#define PLLN 180
@ -371,6 +371,8 @@ void SetSysClock(void)
RCC->CFGR &= ~(RCC_CFGR_PPRE1 | RCC_CFGR_PPRE2);
RCC->CFGR |= PPRE1_DIV | PPRE2_DIV;
RCC->DCKCFGR |= RCC_DCKCFGR_TIMPRE;
}
/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/

4
cmsis-system_stm32f4xx.h
View File

@ -55,10 +55,6 @@
extern "C" {
#endif
// #define __SYSTEM_CLOCK 96000000
// #define __SYSTEM_CLOCK 100000000
// #define __SYSTEM_CLOCK 108000000 // Overclocking is not recommended!
/*
This variable is updated in by calling CMSIS function SystemCoreClockUpdate()
*/