diff --git a/arduino.h b/arduino.h index b8d1a06..fa90d9f 100644 --- a/arduino.h +++ b/arduino.h @@ -61,6 +61,10 @@ #include "arduino_1280.h" //2560 has the same pins and ports so we can reuse the 1280 file. #endif +#if defined (__AVR_AT90USB1287__) + #include "arduino_usb1287.h" +#endif + #ifndef DIO0_PIN #error pins for this chip not defined in arduino.h! If you write an appropriate pin definition and have this firmware work on your chip, please tell us via the forum thread #endif diff --git a/arduino_usb1287.h b/arduino_usb1287.h new file mode 100644 index 0000000..60e6437 --- /dev/null +++ b/arduino_usb1287.h @@ -0,0 +1,493 @@ + +// SPI +#define SCK DIO9 +#define MISO DIO11 +#define MOSI DIO10 +#define SS DIO8 + +// change for your board +#define DEBUG_LED DIO31 /* led D5 red */ + +/* +pins +*/ +#define DIO0_PIN PINA0 +#define DIO0_RPORT PINA +#define DIO0_WPORT PORTA +#define DIO0_DDR DDRA + +#define DIO1_PIN PINA1 +#define DIO1_RPORT PINA +#define DIO1_WPORT PORTA +#define DIO1_DDR DDRA + +#define DIO2_PIN PINA2 +#define DIO2_RPORT PINA +#define DIO2_WPORT PORTA +#define DIO2_DDR DDRA + +#define DIO3_PIN PINA3 +#define DIO3_RPORT PINA +#define DIO3_WPORT PORTA +#define DIO3_DDR DDRA + +#define DIO4_PIN PINA4 +#define DIO4_RPORT PINA +#define DIO4_WPORT PORTA +#define DIO4_DDR DDRA + +#define DIO5_PIN PINA5 +#define DIO5_RPORT PINA +#define DIO5_WPORT PORTA +#define DIO5_DDR DDRA + +#define DIO6_PIN PINA6 +#define DIO6_RPORT PINA +#define DIO6_WPORT PORTA +#define DIO6_DDR DDRA + +#define DIO7_PIN PINA7 +#define DIO7_RPORT PINA +#define DIO7_WPORT PORTA +#define DIO7_DDR DDRA + +#define DIO8_PIN PINB0 +#define DIO8_RPORT PINB +#define DIO8_WPORT PORTB +#define DIO8_DDR DDRB + +#define DIO9_PIN PINB1 +#define DIO9_RPORT PINB +#define DIO9_WPORT PORTB +#define DIO9_DDR DDRB + +#define DIO10_PIN PINB2 +#define DIO10_RPORT PINB +#define DIO10_WPORT PORTB +#define DIO10_DDR DDRB + +#define DIO11_PIN PINB3 +#define DIO11_RPORT PINB +#define DIO11_WPORT PORTB +#define DIO11_DDR DDRB + +#define DIO12_PIN PINB4 +#define DIO12_RPORT PINB +#define DIO12_WPORT PORTB +#define DIO12_DDR DDRB + +#define DIO13_PIN PINB5 +#define DIO13_RPORT PINB +#define DIO13_WPORT PORTB +#define DIO13_DDR DDRB + +#define DIO14_PIN PINB6 +#define DIO14_RPORT PINB +#define DIO14_WPORT PORTB +#define DIO14_DDR DDRB + +#define DIO15_PIN PINB7 +#define DIO15_RPORT PINB +#define DIO15_WPORT PORTB +#define DIO15_DDR DDRB + +#define DIO16_PIN PINC0 +#define DIO16_RPORT PINC +#define DIO16_WPORT PORTC +#define DIO16_DDR DDRC + +#define DIO17_PIN PINC1 +#define DIO17_RPORT PINC +#define DIO17_WPORT PORTC +#define DIO17_DDR DDRC + +#define DIO18_PIN PINC2 +#define DIO18_RPORT PINC +#define DIO18_WPORT PORTC +#define DIO18_DDR DDRC + +#define DIO19_PIN PINC3 +#define DIO19_RPORT PINC +#define DIO19_WPORT PORTC +#define DIO19_DDR DDRC + +#define DIO20_PIN PINC4 +#define DIO20_RPORT PINC +#define DIO20_WPORT PORTC +#define DIO20_DDR DDRC + +#define DIO21_PIN PINC5 +#define DIO21_RPORT PINC +#define DIO21_WPORT PORTC +#define DIO21_DDR DDRC + +#define DIO22_PIN PINC6 +#define DIO22_RPORT PINC +#define DIO22_WPORT PORTC +#define DIO22_DDR DDRC + +#define DIO23_PIN PINC7 +#define DIO23_RPORT PINC +#define DIO23_WPORT PORTC +#define DIO23_DDR DDRC + +#define DIO24_PIN PIND0 +#define DIO24_RPORT PIND +#define DIO24_WPORT PORTD +#define DIO24_DDR DDRD + +#define DIO25_PIN PIND1 +#define DIO25_RPORT PIND +#define DIO25_WPORT PORTD +#define DIO25_DDR DDRD + +#define DIO26_PIN PIND2 +#define DIO26_RPORT PIND +#define DIO26_WPORT PORTD +#define DIO26_DDR DDRD + +#define DIO27_PIN PIND3 +#define DIO27_RPORT PIND +#define DIO27_WPORT PORTD +#define DIO27_DDR DDRD + +#define DIO28_PIN PIND4 +#define DIO28_RPORT PIND +#define DIO28_WPORT PORTD +#define DIO28_DDR DDRD + +#define DIO29_PIN PIND5 +#define DIO29_RPORT PIND +#define DIO29_WPORT PORTD +#define DIO29_DDR DDRD + +#define DIO30_PIN PIND6 +#define DIO30_RPORT PIND +#define DIO30_WPORT PORTD +#define DIO30_DDR DDRD + +#define DIO31_PIN PIND7 +#define DIO31_RPORT PIND +#define DIO31_WPORT PORTD +#define DIO31_DDR DDRD + + +#define DIO32_PIN PINE0 +#define DIO32_RPORT PINE +#define DIO32_WPORT PORTE +#define DIO32_DDR DDRE + +#define DIO33_PIN PINE1 +#define DIO33_RPORT PINE +#define DIO33_WPORT PORTE +#define DIO33_DDR DDRE + +#define DIO34_PIN PINE2 +#define DIO34_RPORT PINE +#define DIO34_WPORT PORTE +#define DIO34_DDR DDRE + +#define DIO35_PIN PINE3 +#define DIO35_RPORT PINE +#define DIO35_WPORT PORTE +#define DIO35_DDR DDRE + +#define DIO36_PIN PINE4 +#define DIO36_RPORT PINE +#define DIO36_WPORT PORTE +#define DIO36_DDR DDRE + +#define DIO37_PIN PINE5 +#define DIO37_RPORT PINE +#define DIO37_WPORT PORTE +#define DIO37_DDR DDRE + +#define DIO38_PIN PINE6 +#define DIO38_RPORT PINE +#define DIO38_WPORT PORTE +#define DIO38_DDR DDRE + +#define DIO39_PIN PINE7 +#define DIO39_RPORT PINE +#define DIO39_WPORT PORTE +#define DIO39_DDR DDRE + +#define AIO0_PIN PINF0 +#define AIO0_RPORT PINF +#define AIO0_WPORT PORTF +#define AIO0_DDR DDRF + +#define AIO1_PIN PINF1 +#define AIO1_RPORT PINF +#define AIO1_WPORT PORTF +#define AIO1_DDR DDRF + +#define AIO2_PIN PINF2 +#define AIO2_RPORT PINF +#define AIO2_WPORT PORTF +#define AIO2_DDR DDRF + +#define AIO3_PIN PINF3 +#define AIO3_RPORT PINF +#define AIO3_WPORT PORTF +#define AIO3_DDR DDRF + +#define AIO4_PIN PINF4 +#define AIO4_RPORT PINF +#define AIO4_WPORT PORTF +#define AIO4_DDR DDRF + +#define AIO5_PIN PINF5 +#define AIO5_RPORT PINF +#define AIO5_WPORT PORTF +#define AIO5_DDR DDRF + +#define AIO6_PIN PINF6 +#define AIO6_RPORT PINF +#define AIO6_WPORT PORTF +#define AIO6_DDR DDRF + +#define AIO7_PIN PINF7 +#define AIO7_RPORT PINF +#define AIO7_WPORT PORTF +#define AIO7_DDR DDRF + +#define DIO40_PIN PINF0 +#define DIO40_RPORT PINF +#define DIO40_WPORT PORTF +#define DIO40_DDR DDRF + +#define DIO41_PIN PINF1 +#define DIO41_RPORT PINF +#define DIO41_WPORT PORTF +#define DIO41_DDR DDRF + +#define DIO42_PIN PINF2 +#define DIO42_RPORT PINF +#define DIO42_WPORT PORTF +#define DIO42_DDR DDRF + +#define DIO43_PIN PINF3 +#define DIO43_RPORT PINF +#define DIO43_WPORT PORTF +#define DIO43_DDR DDRF + +#define DIO44_PIN PINF4 +#define DIO44_RPORT PINF +#define DIO44_WPORT PORTF +#define DIO44_DDR DDRF + +#define DIO45_PIN PINF5 +#define DIO45_RPORT PINF +#define DIO45_WPORT PORTF +#define DIO45_DDR DDRF + +#define DIO46_PIN PINF6 +#define DIO46_RPORT PINF +#define DIO46_WPORT PORTF +#define DIO46_DDR DDRF + +#define DIO47_PIN PINF7 +#define DIO47_RPORT PINF +#define DIO47_WPORT PORTF +#define DIO47_DDR DDRF + + + +#define PA0_PIN PINA0 +#define PA0_RPORT PINA +#define PA0_WPORT PORTA +#define PA0_DDR DDRA +#define PA1_PIN PINA1 +#define PA1_RPORT PINA +#define PA1_WPORT PORTA +#define PA1_DDR DDRA +#define PA2_PIN PINA2 +#define PA2_RPORT PINA +#define PA2_WPORT PORTA +#define PA2_DDR DDRA +#define PA3_PIN PINA3 +#define PA3_RPORT PINA +#define PA3_WPORT PORTA +#define PA3_DDR DDRA +#define PA4_PIN PINA4 +#define PA4_RPORT PINA +#define PA4_WPORT PORTA +#define PA4_DDR DDRA +#define PA5_PIN PINA5 +#define PA5_RPORT PINA +#define PA5_WPORT PORTA +#define PA5_DDR DDRA +#define PA6_PIN PINA6 +#define PA6_RPORT PINA +#define PA6_WPORT PORTA +#define PA6_DDR DDRA +#define PA7_PIN PINA7 +#define PA7_RPORT PINA +#define PA7_WPORT PORTA +#define PA7_DDR DDRA + +#define PB0_PIN PINB0 +#define PB0_RPORT PINB +#define PB0_WPORT PORTB +#define PB0_DDR DDRB +#define PB1_PIN PINB1 +#define PB1_RPORT PINB +#define PB1_WPORT PORTB +#define PB1_DDR DDRB +#define PB2_PIN PINB2 +#define PB2_RPORT PINB +#define PB2_WPORT PORTB +#define PB2_DDR DDRB +#define PB3_PIN PINB3 +#define PB3_RPORT PINB +#define PB3_WPORT PORTB +#define PB3_DDR DDRB +#define PB4_PIN PINB4 +#define PB4_RPORT PINB +#define PB4_WPORT PORTB +#define PB4_DDR DDRB +#define PB5_PIN PINB5 +#define PB5_RPORT PINB +#define PB5_WPORT PORTB +#define PB5_DDR DDRB +#define PB6_PIN PINB6 +#define PB6_RPORT PINB +#define PB6_WPORT PORTB +#define PB6_DDR DDRB +#define PB7_PIN PINB7 +#define PB7_RPORT PINB +#define PB7_WPORT PORTB +#define PB7_DDR DDRB + +#define PC0_PIN PINC0 +#define PC0_RPORT PINC +#define PC0_WPORT PORTC +#define PC0_DDR DDRC +#define PC1_PIN PINC1 +#define PC1_RPORT PINC +#define PC1_WPORT PORTC +#define PC1_DDR DDRC +#define PC2_PIN PINC2 +#define PC2_RPORT PINC +#define PC2_WPORT PORTC +#define PC2_DDR DDRC +#define PC3_PIN PINC3 +#define PC3_RPORT PINC +#define PC3_WPORT PORTC +#define PC3_DDR DDRC +#define PC4_PIN PINC4 +#define PC4_RPORT PINC +#define PC4_WPORT PORTC +#define PC4_DDR DDRC +#define PC5_PIN PINC5 +#define PC5_RPORT PINC +#define PC5_WPORT PORTC +#define PC5_DDR DDRC +#define PC6_PIN PINC6 +#define PC6_RPORT PINC +#define PC6_WPORT PORTC +#define PC6_DDR DDRC +#define PC7_PIN PINC7 +#define PC7_RPORT PINC +#define PC7_WPORT PORTC +#define PC7_DDR DDRC + +#define PD0_PIN PIND0 +#define PD0_RPORT PIND +#define PD0_WPORT PORTD +#define PD0_DDR DDRD +#define PD1_PIN PIND1 +#define PD1_RPORT PIND +#define PD1_WPORT PORTD +#define PD1_DDR DDRD +#define PD2_PIN PIND2 +#define PD2_RPORT PIND +#define PD2_WPORT PORTD +#define PD2_DDR DDRD +#define PD3_PIN PIND3 +#define PD3_RPORT PIND +#define PD3_WPORT PORTD +#define PD3_DDR DDRD +#define PD4_PIN PIND4 +#define PD4_RPORT PIND +#define PD4_WPORT PORTD +#define PD4_DDR DDRD +#define PD5_PIN PIND5 +#define PD5_RPORT PIND +#define PD5_WPORT PORTD +#define PD5_DDR DDRD +#define PD6_PIN PIND6 +#define PD6_RPORT PIND +#define PD6_WPORT PORTD +#define PD6_DDR DDRD +#define PD7_PIN PIND7 +#define PD7_RPORT PIND +#define PD7_WPORT PORTD +#define PD7_DDR DDRD + +#define PE0_PIN PINE0 +#define PE0_RPORT PINE +#define PE0_WPORT PORTE +#define PE0_DDR DDRE +#define PE1_PIN PINE1 +#define PE1_RPORT PINE +#define PE1_WPORT PORTE +#define PE1_DDR DDRE +#define PE2_PIN PINE2 +#define PE2_RPORT PINE +#define PE2_WPORT PORTE +#define PE2_DDR DDRE +#define PE3_PIN PINE3 +#define PE3_RPORT PINE +#define PE3_WPORT PORTE +#define PE3_DDR DDRE +#define PE4_PIN PINE4 +#define PE4_RPORT PINE +#define PE4_WPORT PORTE +#define PE4_DDR DDRE +#define PE5_PIN PINE5 +#define PE5_RPORT PINE +#define PE5_WPORT PORTE +#define PE5_DDR DDRE +#define PE6_PIN PINE6 +#define PE6_RPORT PINE +#define PE6_WPORT PORTE +#define PE6_DDR DDRE +#define PE7_PIN PINE7 +#define PE7_RPORT PINE +#define PE7_WPORT PORTE +#define PE7_DDR DDRE + +#define PF0_PIN PINF0 +#define PF0_RPORT PINF +#define PF0_WPORT PORTF +#define PF0_DDR DDRF +#define PF1_PIN PINF1 +#define PF1_RPORT PINF +#define PF1_WPORT PORTF +#define PF1_DDR DDRF +#define PF2_PIN PINF2 +#define PF2_RPORT PINF +#define PF2_WPORT PORTF +#define PF2_DDR DDRF +#define PF3_PIN PINF3 +#define PF3_RPORT PINF +#define PF3_WPORT PORTF +#define PF3_DDR DDRF +#define PF4_PIN PINF4 +#define PF4_RPORT PINF +#define PF4_WPORT PORTF +#define PF4_DDR DDRF +#define PF5_PIN PINF5 +#define PF5_RPORT PINF +#define PF5_WPORT PORTF +#define PF5_DDR DDRF +#define PF6_PIN PINF6 +#define PF6_RPORT PINF +#define PF6_WPORT PORTF +#define PF6_DDR DDRF +#define PF7_PIN PINF7 +#define PF7_RPORT PINF +#define PF7_WPORT PORTF +#define PF7_DDR DDRF