reorganise intercom to send packets from extruder main loop, also generalise protocol as discussed in forum
This commit is contained in:
parent
088f79aa11
commit
d0601716e8
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@ -31,7 +31,7 @@
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PROGRAM = extruder
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SOURCES = $(PROGRAM).c intercom.c delay.c analog.c watchdog.c heater.c temp.c
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SOURCES = $(PROGRAM).c intercom.c delay.c analog.c watchdog.c heater.c temp.c timer.c crc.c
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##############################################################################
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# #
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@ -0,0 +1,24 @@
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#include "crc.h"
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#include <util/crc16.h>
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// uint16_t _crc16_update(uint16_t crc, uint8_t a) {
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// int i;
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// crc ^= a;
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// for (i = 0; i < 8; ++i)
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// {
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// if (crc & 1)
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// crc = (crc >> 1) ^ 0xA001;
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// else
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// crc = (crc >> 1);
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// }
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// return crc;
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// }
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uint16_t crc_block(void *data, uint16_t len) {
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uint16_t crc = 0;
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for (; len; data++, len--) {
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crc = _crc16_update(crc, *((uint8_t *) data));
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}
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return crc;
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}
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@ -0,0 +1,8 @@
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#ifndef _CRC_H
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#define _CRC_H
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#include <stdint.h>
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uint16_t crc_block(void *data, uint16_t len);
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#endif /* _CRC_H */
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@ -9,6 +9,7 @@
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#include "watchdog.h"
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#include "heater.h"
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#include "temp.h"
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#include "timer.h"
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static uint8_t motor_pwm;
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@ -168,6 +169,9 @@ void init(void) {
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// set up extruder motor driver
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motor_init();
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// set up clock
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timer_init();
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// enable interrupts
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sei();
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@ -190,11 +194,21 @@ int main (void)
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//Read motor PWM
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motor_pwm = analog_read(TRIM_POT_CHANNEL) >> 2;
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ifclock(CLOCK_FLAG_10MS) {
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// check temperatures and manage heaters
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temp_sensor_tick();
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}
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// check if we've had a new intercom packet
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if (intercom_flags & FLAG_NEW_RX) {
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intercom_flags &= ~FLAG_NEW_RX;
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send_temperature(0, temp_get(0));
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send_temperature(1, temp_get(1));
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temp_set(0, read_temperature(0));
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temp_set(1, read_temperature(1));
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start_send();
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}
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}
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}
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@ -9,6 +9,7 @@
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#define disable_heater() heater_set(0, 0)
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#undef DEFINE_HEATER
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#undef _CONFIG_H
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#define DEFINE_HEATER(name, port, pin, pwm) HEATER_ ## name,
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typedef enum
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{
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@ -17,21 +17,16 @@ enum {
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typedef struct {
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uint8_t start;
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union {
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struct {
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uint8_t dio0 :1;
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uint8_t dio1 :1;
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uint8_t dio2 :1;
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uint8_t dio3 :1;
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uint8_t dio4 :1;
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uint8_t dio5 :1;
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uint8_t dio6 :1;
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uint8_t dio7 :1;
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};
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uint8_t dio;
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};
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uint8_t controller_num;
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uint16_t temp[3];
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uint8_t control_word;
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uint8_t control_index;
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union {
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int32_t control_data_int32;
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uint32_t control_data_uint32;
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float control_data_float;
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uint16_t temp[2];
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};
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uint8_t err;
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uint8_t crc;
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} intercom_packet_t;
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@ -120,9 +115,16 @@ void start_send(void) {
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intercom_flags = (intercom_flags & ~FLAG_TX_FINISHED) | FLAG_TX_IN_PROGRESS;
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SREG = sreg;
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// enable transmit pin
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enable_transmit();
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// set start byte
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tx.packet.start = START;
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// set packet type
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tx.packet.control_word = 105;
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tx.packet.control_index = 0;
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// calculate CRC for outgoing packet
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for (i = 0; i < (sizeof(intercom_packet_t) - 1); i++) {
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txcrc ^= tx.data[i];
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@ -133,17 +135,14 @@ void start_send(void) {
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_tx.data[i] = tx.data[i];
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}
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// enable transmit pin
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enable_transmit();
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delay_us(15);
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packet_pointer = 0;
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// actually start sending the packet
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packet_pointer = 0;
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#ifdef HOST
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#ifdef HOST
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UCSR1B |= MASK(UDRIE1);
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#else
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#else
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UCSR0B |= MASK(UDRIE0);
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#endif
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#endif
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}
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/*
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@ -199,15 +198,18 @@ ISR(USART_RX_vect)
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}
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}
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intercom_flags = (intercom_flags & ~FLAG_RX_IN_PROGRESS) | FLAG_NEW_RX;
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#ifndef HOST
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if (_rx.packet.controller_num == THIS_CONTROLLER_NUM) {
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if (rx.packet.controller_num == THIS_CONTROLLER_NUM) {
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if (rxcrc != _rx.packet.crc)
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tx.packet.err = ERROR_BAD_CRC;
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else
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intercom_flags = (intercom_flags & ~FLAG_RX_IN_PROGRESS) | FLAG_NEW_RX;
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// not sure why exactly this delay is needed, but wihtout it first byte never arrives.
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delay_us(150);
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start_send();
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// delay_us(150);
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// start_send();
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}
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#else
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intercom_flags = (intercom_flags & ~FLAG_RX_IN_PROGRESS) | FLAG_NEW_RX;
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#endif
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}
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}
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@ -5,11 +5,11 @@
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#include "config.h"
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#ifdef HOST
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#define enable_transmit() do { WRITE(TX_ENABLE_PIN,1); UCSR1B &= ~MASK(RXEN1); } while(0)
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#define disable_transmit() do { WRITE(TX_ENABLE_PIN,0); UCSR1B |= MASK(RXEN1); } while(0)
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#define enable_transmit() do { WRITE(TX_ENABLE_PIN,1); UCSR1B &=~MASK(RXEN1); } while(0)
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#define disable_transmit() do { WRITE(TX_ENABLE_PIN,0); UCSR1B &= ~(MASK(TXCIE1) | MASK(UDRIE1)); UCSR1B |= MASK(RXEN1); } while(0)
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#else
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#define enable_transmit() do { WRITE(TX_ENABLE_PIN,1); UCSR0B &= ~MASK(RXEN0); } while(0)
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#define disable_transmit() do { WRITE(TX_ENABLE_PIN,0); UCSR0B |= MASK(RXEN0); } while(0)
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#define disable_transmit() do { WRITE(TX_ENABLE_PIN,0); UCSR0B &= ~(MASK(TXCIE0) | MASK(UDRIE0)); UCSR0B |= MASK(RXEN0); } while(0)
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#endif
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// initialise serial subsystem
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@ -13,6 +13,7 @@ we still need to specify which analog pins we use in machine.h for the analog se
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*/
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#undef DEFINE_TEMP_SENSOR
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#undef _CONFIG_H
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#define DEFINE_TEMP_SENSOR(name, type, pin) TEMP_SENSOR_ ## name,
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typedef enum {
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#include "config.h"
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@ -21,6 +22,15 @@ typedef enum {
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} temp_sensor_t;
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#undef DEFINE_TEMP_SENSOR
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typedef enum {
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TT_THERMISTOR,
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TT_MAX6675,
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TT_AD595,
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TT_PT100,
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TT_INTERCOM,
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TT_DUMMY,
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} temp_type_t;
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#define temp_tick temp_sensor_tick
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void temp_init(void);
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@ -34,4 +44,4 @@ uint16_t temp_get(temp_sensor_t index);
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void temp_print(temp_sensor_t index);
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#endif /* _TIMER_H */
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#endif /* _TEMP_H */
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@ -0,0 +1,164 @@
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#include "timer.h"
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#include <avr/interrupt.h>
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#include "arduino.h"
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#include "config.h"
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#ifdef HOST
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#include "dda_queue.h"
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#endif
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/*
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how often we overflow and update our clock; with F_CPU=16MHz, max is < 4.096ms (TICK_TIME = 65535)
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*/
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#define TICK_TIME 2 MS
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#define TICK_TIME_MS (TICK_TIME / (F_CPU / 1000))
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volatile uint32_t next_step_time;
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uint8_t clock_counter_10ms = 0;
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uint8_t clock_counter_250ms = 0;
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uint8_t clock_counter_1s = 0;
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volatile uint8_t clock_flag = 0;
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// comparator B is the "clock", happens every TICK_TIME
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ISR(TIMER1_COMPB_vect) {
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// set output compare register to the next clock tick
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OCR1B = (OCR1B + TICK_TIME) & 0xFFFF;
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/*
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clock stuff
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*/
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clock_counter_10ms += TICK_TIME_MS;
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if (clock_counter_10ms >= 10) {
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clock_counter_10ms -= 10;
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clock_flag |= CLOCK_FLAG_10MS;
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clock_counter_250ms += 1;
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if (clock_counter_250ms >= 25) {
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clock_counter_250ms -= 25;
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clock_flag |= CLOCK_FLAG_250MS;
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clock_counter_1s += 1;
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if (clock_counter_1s >= 4) {
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clock_counter_1s -= 4;
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clock_flag |= CLOCK_FLAG_1S;
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}
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}
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}
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}
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#ifdef HOST
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void timer1_compa_isr(void) __attribute__ ((hot));
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void timer1_compa_isr() {
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// led on
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WRITE(SCK, 1);
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// disable this interrupt. if we set a new timeout, it will be re-enabled when appropriate
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TIMSK1 &= ~MASK(OCIE1A);
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// stepper tick
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queue_step();
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// led off
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WRITE(SCK, 0);
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}
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// comparator A is the step timer. It has higher priority then B.
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ISR(TIMER1_COMPA_vect) {
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// Check if this is a real step, or just a next_step_time "overflow"
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if (next_step_time < 65536) {
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next_step_time = 0;
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// step!
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timer1_compa_isr();
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return;
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}
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next_step_time -= 65536;
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// similar algorithm as described in setTimer below.
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if (next_step_time < 65536) {
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OCR1A = (OCR1A + next_step_time) & 0xFFFF;
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} else if(next_step_time < 75536){
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OCR1A = (OCR1A - 10000) & 0xFFFF;
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next_step_time += 10000;
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}
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// leave OCR1A as it was
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}
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#endif /* ifdef HOST */
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void timer_init()
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{
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// no outputs
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TCCR1A = 0;
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// Normal Mode
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TCCR1B |= MASK(CS10);
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// set up "clock" comparator for first tick
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OCR1B = TICK_TIME & 0xFFFF;
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// enable interrupt
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TIMSK1 |= MASK(OCIE1B);
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}
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#ifdef HOST
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void setTimer(uint32_t delay)
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{
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// save interrupt flag
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uint8_t sreg = SREG;
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uint16_t step_start = 0;
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// disable interrupts
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cli();
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// re-enable clock interrupt in case we're recovering from emergency stop
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TIMSK1 |= MASK(OCIE1B);
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if (delay > 0) {
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if (delay <= 16) {
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// unfortunately, force registers don't trigger an interrupt, so we do the following
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// "fire" ISR- maybe it sets a new timeout
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timer1_compa_isr();
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}
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else {
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// Assume all steps belong to one move. Within one move the delay is
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// from one step to the next one, which should be more or less the same
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// as from one step interrupt to the next one. The last step interrupt happend
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// at OCR1A, so start delay from there.
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step_start = OCR1A;
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if (next_step_time == 0) {
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// new move, take current time as start value
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step_start = TCNT1;
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}
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next_step_time = delay;
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if (next_step_time < 65536) {
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// set the comparator directly to the next real step
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OCR1A = (next_step_time + step_start) & 0xFFFF;
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}
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else if (next_step_time < 75536) {
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// Next comparator interrupt would have to trigger another
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// interrupt within a short time (possibly within 1 cycle).
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// Avoid the impossible by firing the interrupt earlier.
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OCR1A = (step_start - 10000) & 0xFFFF;
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next_step_time += 10000;
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}
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else {
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OCR1A = step_start;
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}
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TIMSK1 |= MASK(OCIE1A);
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}
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} else {
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// flag: move has ended
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next_step_time = 0;
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TIMSK1 &= ~MASK(OCIE1A);
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}
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// restore interrupt flag
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SREG = sreg;
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}
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void timer_stop() {
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// disable all interrupts
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TIMSK1 = 0;
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}
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#endif /* ifdef HOST */
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@ -0,0 +1,30 @@
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#ifndef _TIMER_H
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#define _TIMER_H
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#include <stdint.h>
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#include <avr/io.h>
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// time-related constants
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#define US * (F_CPU / 1000000)
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#define MS * (F_CPU / 1000)
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/*
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clock stuff
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*/
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extern volatile uint8_t clock_flag;
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#define CLOCK_FLAG_10MS 1
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#define CLOCK_FLAG_250MS 2
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#define CLOCK_FLAG_1S 4
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#define ifclock(F) for (;clock_flag & (F);clock_flag &= ~(F))
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/*
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timer stuff
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*/
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void timer_init(void) __attribute__ ((cold));
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void setTimer(uint32_t delay);
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void timer_stop(void);
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#endif /* _TIMER_H */
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1
heater.h
1
heater.h
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@ -9,6 +9,7 @@
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#define disable_heater() heater_set(0, 0)
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#undef DEFINE_HEATER
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#undef _CONFIG_H
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#define DEFINE_HEATER(name, port, pin, pwm) HEATER_ ## name,
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typedef enum
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{
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50
intercom.c
50
intercom.c
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@ -17,21 +17,16 @@ enum {
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typedef struct {
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uint8_t start;
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union {
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struct {
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uint8_t dio0 :1;
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uint8_t dio1 :1;
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uint8_t dio2 :1;
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uint8_t dio3 :1;
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uint8_t dio4 :1;
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uint8_t dio5 :1;
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uint8_t dio6 :1;
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uint8_t dio7 :1;
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};
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uint8_t dio;
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};
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uint8_t controller_num;
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uint16_t temp[3];
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uint8_t control_word;
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uint8_t control_index;
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union {
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int32_t control_data_int32;
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uint32_t control_data_uint32;
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float control_data_float;
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uint16_t temp[2];
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};
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uint8_t err;
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uint8_t crc;
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} intercom_packet_t;
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@ -120,9 +115,16 @@ void start_send(void) {
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intercom_flags = (intercom_flags & ~FLAG_TX_FINISHED) | FLAG_TX_IN_PROGRESS;
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SREG = sreg;
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// enable transmit pin
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enable_transmit();
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// set start byte
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tx.packet.start = START;
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// set packet type
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tx.packet.control_word = 105;
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tx.packet.control_index = 0;
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// calculate CRC for outgoing packet
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for (i = 0; i < (sizeof(intercom_packet_t) - 1); i++) {
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txcrc ^= tx.data[i];
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@ -133,17 +135,14 @@ void start_send(void) {
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_tx.data[i] = tx.data[i];
|
||||
}
|
||||
|
||||
// enable transmit pin
|
||||
enable_transmit();
|
||||
delay_us(15);
|
||||
packet_pointer = 0;
|
||||
|
||||
// actually start sending the packet
|
||||
packet_pointer = 0;
|
||||
#ifdef HOST
|
||||
#ifdef HOST
|
||||
UCSR1B |= MASK(UDRIE1);
|
||||
#else
|
||||
#else
|
||||
UCSR0B |= MASK(UDRIE0);
|
||||
#endif
|
||||
#endif
|
||||
}
|
||||
|
||||
/*
|
||||
|
|
@ -199,15 +198,18 @@ ISR(USART_RX_vect)
|
|||
}
|
||||
}
|
||||
|
||||
intercom_flags = (intercom_flags & ~FLAG_RX_IN_PROGRESS) | FLAG_NEW_RX;
|
||||
#ifndef HOST
|
||||
if (_rx.packet.controller_num == THIS_CONTROLLER_NUM) {
|
||||
if (rx.packet.controller_num == THIS_CONTROLLER_NUM) {
|
||||
if (rxcrc != _rx.packet.crc)
|
||||
tx.packet.err = ERROR_BAD_CRC;
|
||||
else
|
||||
intercom_flags = (intercom_flags & ~FLAG_RX_IN_PROGRESS) | FLAG_NEW_RX;
|
||||
// not sure why exactly this delay is needed, but wihtout it first byte never arrives.
|
||||
delay_us(150);
|
||||
start_send();
|
||||
// delay_us(150);
|
||||
// start_send();
|
||||
}
|
||||
#else
|
||||
intercom_flags = (intercom_flags & ~FLAG_RX_IN_PROGRESS) | FLAG_NEW_RX;
|
||||
#endif
|
||||
}
|
||||
}
|
||||
|
|
|
|||
|
|
@ -5,11 +5,11 @@
|
|||
#include "config.h"
|
||||
|
||||
#ifdef HOST
|
||||
#define enable_transmit() do { WRITE(TX_ENABLE_PIN,1); UCSR1B &= ~MASK(RXEN1); } while(0)
|
||||
#define disable_transmit() do { WRITE(TX_ENABLE_PIN,0); UCSR1B |= MASK(RXEN1); } while(0)
|
||||
#define enable_transmit() do { WRITE(TX_ENABLE_PIN,1); UCSR1B &=~MASK(RXEN1); } while(0)
|
||||
#define disable_transmit() do { WRITE(TX_ENABLE_PIN,0); UCSR1B &= ~(MASK(TXCIE1) | MASK(UDRIE1)); UCSR1B |= MASK(RXEN1); } while(0)
|
||||
#else
|
||||
#define enable_transmit() do { WRITE(TX_ENABLE_PIN,1); UCSR0B &= ~MASK(RXEN0); } while(0)
|
||||
#define disable_transmit() do { WRITE(TX_ENABLE_PIN,0); UCSR0B |= MASK(RXEN0); } while(0)
|
||||
#define disable_transmit() do { WRITE(TX_ENABLE_PIN,0); UCSR0B &= ~(MASK(TXCIE0) | MASK(UDRIE0)); UCSR0B |= MASK(RXEN0); } while(0)
|
||||
#endif
|
||||
|
||||
// initialise serial subsystem
|
||||
|
|
|
|||
1
temp.h
1
temp.h
|
|
@ -13,6 +13,7 @@ we still need to specify which analog pins we use in machine.h for the analog se
|
|||
*/
|
||||
|
||||
#undef DEFINE_TEMP_SENSOR
|
||||
#undef _CONFIG_H
|
||||
#define DEFINE_TEMP_SENSOR(name, type, pin) TEMP_SENSOR_ ## name,
|
||||
typedef enum {
|
||||
#include "config.h"
|
||||
|
|
|
|||
9
timer.c
9
timer.c
|
|
@ -2,7 +2,12 @@
|
|||
|
||||
#include <avr/interrupt.h>
|
||||
|
||||
#include "arduino.h"
|
||||
#include "config.h"
|
||||
|
||||
#ifdef HOST
|
||||
#include "dda_queue.h"
|
||||
#endif
|
||||
|
||||
/*
|
||||
how often we overflow and update our clock; with F_CPU=16MHz, max is < 4.096ms (TICK_TIME = 65535)
|
||||
|
|
@ -44,6 +49,7 @@ ISR(TIMER1_COMPB_vect) {
|
|||
}
|
||||
}
|
||||
|
||||
#ifdef HOST
|
||||
void timer1_compa_isr(void) __attribute__ ((hot));
|
||||
void timer1_compa_isr() {
|
||||
// led on
|
||||
|
|
@ -80,6 +86,7 @@ ISR(TIMER1_COMPA_vect) {
|
|||
}
|
||||
// leave OCR1A as it was
|
||||
}
|
||||
#endif /* ifdef HOST */
|
||||
|
||||
void timer_init()
|
||||
{
|
||||
|
|
@ -93,6 +100,7 @@ void timer_init()
|
|||
TIMSK1 |= MASK(OCIE1B);
|
||||
}
|
||||
|
||||
#ifdef HOST
|
||||
void setTimer(uint32_t delay)
|
||||
{
|
||||
// save interrupt flag
|
||||
|
|
@ -153,3 +161,4 @@ void timer_stop() {
|
|||
// disable all interrupts
|
||||
TIMSK1 = 0;
|
||||
}
|
||||
#endif /* ifdef HOST */
|
||||
|
|
|
|||
Loading…
Reference in New Issue