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ARM: prettify cmsis-lpc11xx.h. 

This is, remove trailing whitespace and such stuff. Log of all
changes near the top of the file.
This commit is contained in:
Markus Hitter 2015-07-29 23:47:16 +02:00
parent a7240523e1
commit d1c624f0c5
1 changed files with 66 additions and 71 deletions
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41
cmsis-lpc11xx.h
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@ -27,16 +27,15 @@
****************************************************************************/ ****************************************************************************/
/* /*
Notes for Teacup: Copied in spring 2015 from https://github.com/mbedmicro/mbed, file
mbed/libraries/mbed/targets/cmsis/TARGET_NXP/TARGET_LPC11XX_11CXX/LPC11xx.h
Copied from $(MBED)/libraries/mbed/targets/cmsis/TARGET_NXP/TARGET_LPC11XX_11CXX/LPC11xx.h. Changes for Teacup:
Used only to get things running quickly. Without serial it's almost - Prefixed names of #include files with cmsis- to match the names of the
impossible to see wether code changes work. Should go away soon, because
all this MBED stuff is too bloated for Teacup's purposes.
- Prefixed names of #include files with mbed- to match the names of the
copies in the Teacup repo. copies in the Teacup repo.
- Removed long === runs to not disturb grep'ing for them on Git conflicts.
- Replaced tabs by spaces and removed trailing whitespace.
*/ */
#ifndef __LPC11xx_H__ #ifndef __LPC11xx_H__
#define __LPC11xx_H__ #define __LPC11xx_H__
@ -64,9 +63,7 @@
*/ */
/* /*
* ==========================================================================
* ---------- Interrupt Number Definition ----------------------------------- * ---------- Interrupt Number Definition -----------------------------------
* ==========================================================================
*/ */
typedef enum IRQn typedef enum IRQn
{ {
@ -113,9 +110,7 @@ typedef enum IRQn
} IRQn_Type; } IRQn_Type;
/* /*
* ==========================================================================
* ----------- Processor and Core Peripheral Section ------------------------ * ----------- Processor and Core Peripheral Section ------------------------
* ==========================================================================
*/ */
/* Configuration of the Cortex-M0 Processor and Core Peripherals */ /* Configuration of the Cortex-M0 Processor and Core Peripherals */
@ -126,8 +121,8 @@ typedef enum IRQn
/*@}*/ /* end of group LPC11xx_CMSIS */ /*@}*/ /* end of group LPC11xx_CMSIS */
#include "mbed-core_cm0.h" /* Cortex-M0 processor and core peripherals */ #include "mbed-core_cm0.h" /* Cortex-M0 processor and core peripherals */
#include "mbed-system_LPC11xx.h" /* System Header */ #include "mbed-system_LPC11xx.h" /* System Header */
/******************************************************************************/ /******************************************************************************/
@ -471,8 +466,8 @@ typedef struct
__O uint32_t FEED; /*!< Offset: 0x008 Watchdog feed sequence register (W) */ __O uint32_t FEED; /*!< Offset: 0x008 Watchdog feed sequence register (W) */
__I uint32_t TV; /*!< Offset: 0x00C Watchdog timer value register (R) */ __I uint32_t TV; /*!< Offset: 0x00C Watchdog timer value register (R) */
uint32_t RESERVED0; uint32_t RESERVED0;
__IO uint32_t WARNINT; /*!< Offset: 0x014 Watchdog timer warning int. register (R/W) */ __IO uint32_t WARNINT; /*!< Offset: 0x014 Watchdog timer warning int. register (R/W) */
__IO uint32_t WINDOW; /*!< Offset: 0x018 Watchdog timer window value register (R/W) */ __IO uint32_t WINDOW; /*!< Offset: 0x018 Watchdog timer window value register (R/W) */
} LPC_WDT_TypeDef; } LPC_WDT_TypeDef;
/*@}*/ /* end of group LPC11xx_WDT */ /*@}*/ /* end of group LPC11xx_WDT */
@ -499,7 +494,7 @@ typedef struct
*/ */
typedef struct typedef struct
{ {
__IO uint32_t CNTL; /* 0x000 */ __IO uint32_t CNTL; /* 0x000 */
__IO uint32_t STAT; __IO uint32_t STAT;
__IO uint32_t EC; __IO uint32_t EC;
__IO uint32_t BT; __IO uint32_t BT;
@ -507,7 +502,7 @@ typedef struct
__IO uint32_t TEST; __IO uint32_t TEST;
__IO uint32_t BRPE; __IO uint32_t BRPE;
uint32_t RESERVED0; uint32_t RESERVED0;
__IO uint32_t IF1_CMDREQ; /* 0x020 */ __IO uint32_t IF1_CMDREQ; /* 0x020 */
__IO uint32_t IF1_CMDMSK; __IO uint32_t IF1_CMDMSK;
__IO uint32_t IF1_MSK1; __IO uint32_t IF1_MSK1;
__IO uint32_t IF1_MSK2; __IO uint32_t IF1_MSK2;
@ -519,7 +514,7 @@ typedef struct
__IO uint32_t IF1_DB1; __IO uint32_t IF1_DB1;
__IO uint32_t IF1_DB2; __IO uint32_t IF1_DB2;
uint32_t RESERVED1[13]; uint32_t RESERVED1[13];
__IO uint32_t IF2_CMDREQ; /* 0x080 */ __IO uint32_t IF2_CMDREQ; /* 0x080 */
__IO uint32_t IF2_CMDMSK; __IO uint32_t IF2_CMDMSK;
__IO uint32_t IF2_MSK1; __IO uint32_t IF2_MSK1;
__IO uint32_t IF2_MSK2; __IO uint32_t IF2_MSK2;
@ -531,19 +526,19 @@ typedef struct
__IO uint32_t IF2_DB1; __IO uint32_t IF2_DB1;
__IO uint32_t IF2_DB2; __IO uint32_t IF2_DB2;
uint32_t RESERVED2[21]; uint32_t RESERVED2[21];
__I uint32_t TXREQ1; /* 0x100 */ __I uint32_t TXREQ1; /* 0x100 */
__I uint32_t TXREQ2; __I uint32_t TXREQ2;
uint32_t RESERVED3[6]; uint32_t RESERVED3[6];
__I uint32_t ND1; /* 0x120 */ __I uint32_t ND1; /* 0x120 */
__I uint32_t ND2; __I uint32_t ND2;
uint32_t RESERVED4[6]; uint32_t RESERVED4[6];
__I uint32_t IR1; /* 0x140 */ __I uint32_t IR1; /* 0x140 */
__I uint32_t IR2; __I uint32_t IR2;
uint32_t RESERVED5[6]; uint32_t RESERVED5[6];
__I uint32_t MSGV1; /* 0x160 */ __I uint32_t MSGV1; /* 0x160 */
__I uint32_t MSGV2; __I uint32_t MSGV2;
uint32_t RESERVED6[6]; uint32_t RESERVED6[6];
__IO uint32_t CLKDIV; /* 0x180 */ __IO uint32_t CLKDIV; /* 0x180 */
} LPC_CAN_TypeDef; } LPC_CAN_TypeDef;
/*@}*/ /* end of group LPC11xx_CAN */ /*@}*/ /* end of group LPC11xx_CAN */