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force compare doesn't fire an interrupt, work around

This commit is contained in:
Michael Moon 2010-11-08 20:56:33 +11:00
parent a4b0c2f848
commit d2df112179
1 changed files with 14 additions and 13 deletions
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27
timer.c
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@ -21,11 +21,9 @@ ISR(TIMER1_CAPT_vect) {
*/
if (next_step_time > TICK_TIME)
next_step_time -= TICK_TIME;
else {
if (next_step_time > 0) {
OCR1A = next_step_time & 0xFFFF;
TIMSK1 |= MASK(OCIE1A);
}
else if (next_step_time > 0) {
OCR1A = next_step_time & 0xFFFF;
TIMSK1 |= MASK(OCIE1A);
}
/*
@ -50,7 +48,8 @@ ISR(TIMER1_CAPT_vect) {
}
}
ISR(TIMER1_COMPA_vect) {
void timer1_compa_isr(void) __attribute__ ((hot));
void timer1_compa_isr() {
// led on
WRITE(SCK, 1);
@ -60,15 +59,17 @@ ISR(TIMER1_COMPA_vect) {
// ensure we don't interrupt again unless timer is reset
next_step_time = 0;
/*
stepper tick
*/
// stepper tick
queue_step();
// led off
WRITE(SCK, 0);
}
ISR(TIMER1_COMPA_vect) {
timer1_compa_isr();
}
void timer_init()
{
// no outputs
@ -95,11 +96,11 @@ void setTimer(uint32_t delay)
// mangle timer variables
next_step_time = delay + TCNT1;
if (delay <= 16) {
// force interrupt
// TODO: datasheet says force only doesn't work in CTC:COMPA mode, test if CTC:ICR mode allows force
TIMSK1 |= MASK(OCIE1A);
TCCR1C |= MASK(FOC1A);
// unfortunately, force registers don't trigger an interrupt, so we do the following
// don't step from timer interrupt
next_step_time = 0;
// "fire" ISR- maybe it sets a new timeout
timer1_compa_isr();
}
else if (delay <= TICK_TIME) {
OCR1A = next_step_time & 0xFFFF;