ARM: port memory_barrier.h.

This is just a best guess, because none of the compiled code uses
it so far, but a pretty safe one.

memory_barrier.h

@@ -1,20 +1,11 @@
 #ifndef _MEMORY_BARRIER_H_
 #define _MEMORY_BARRIER_H_
 
-#ifdef SIMULATOR
-  #define CLI_SEI_BUG_MEMORY_BARRIER()
-  #define MEMORY_BARRIER()
+#include "cpu.h"
 
-  #define ATOMIC_START { \
-                         uint8_t save_reg = sim_interrupts; \
-                         cli();
 
-  #define ATOMIC_END     MEMORY_BARRIER(); \
-                         if (save_reg) sei(); \
-                       }
+#if defined __AVR__
 
-#elif defined __AVR__
-#include <util/atomic.h>
 #include <avr/version.h>
 
 // Provide a memory barrier to the compiler. This informs
@@ -50,5 +41,25 @@
                      SREG = save_reg; \
                    }
 
-#endif
-#endif
+#elif defined __ARMEL__
+
+  #define ATOMIC_START cli();
+  #define ATOMIC_END sei();
+  #define MEMORY_BARRIER()
+
+#elif defined SIMULATOR
+
+  #define CLI_SEI_BUG_MEMORY_BARRIER()
+  #define MEMORY_BARRIER()
+
+  #define ATOMIC_START { \
+                         uint8_t save_reg = sim_interrupts; \
+                         cli();
+
+  #define ATOMIC_END     MEMORY_BARRIER(); \
+                         if (save_reg) sei(); \
+                       }
+
+#endif /* __AVR__, __ARMEL__, SIMULATOR */
+
+#endif /* _MEMORY_BARRIER_H_ */