372 lines
12 KiB
C
372 lines
12 KiB
C
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/** \file
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\brief I2C / TWI subsystem
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"TWI", "Two Wire Interface", is Atmel's name for the (patented) I2C bus
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system. I2C is technically pretty sophisticated, it also takes the current
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state of these two wires as part of the protocol into account. Like SPI it's
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a master/slave system with a clock signal on the wire. Unlike SPI,
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communication partners aren't choosen by setting a pin, but by by
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transferring an address byte before the actual data.
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Accordingly, code has to deal with states, transmissions have a start and
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an end, and actions on the bus can result in different states, like success
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or failure.
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avr-libc comes with good sample code:
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http://www.nongnu.org/avr-libc/examples/twitest/twitest.c
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For technical details see section 22 of atmega328 datasheet.
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*/
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#include "i2c.h"
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#ifdef I2C
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#include <avr/io.h>
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#include <avr/interrupt.h>
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#include <util/twi.h>
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#if defined I2C_MASTER_MODE && defined I2C_SLAVE_MODE
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#error Cant be I2C master and slave at the same time.
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#endif
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// Address of the device that is communicated with.
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uint8_t i2c_address;
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// State of TWI component of MCU.
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volatile uint8_t i2c_state;
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// Index into the send/receive buffer.
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uint8_t i2c_index;
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// Count of bytes to be sent.
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uint8_t i2c_byte_count;
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#ifdef I2C_EEPROM_SUPPORT
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// For SAWSARP mode (see ENHA in i2c.h).
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uint8_t i2c_page_address[I2C_PAGE_ADDRESS_SIZE];
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// Index into the page address buffer.
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uint8_t i2c_page_index;
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// Count of bytes in page address.
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uint8_t i2c_page_count;
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#endif /* I2C_EEPROM_SUPPORT */
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#ifdef I2C_SLAVE_MODE
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uint8_t i2c_in_buffer[I2C_SLAVE_RX_BUFFER_SIZE];
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uint8_t i2c_out_buffer[I2C_SLAVE_TX_BUFFER_SIZE];
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#else
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uint8_t *i2c_buffer;
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#endif /* I2C_SLAVE_MODE */
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void i2c_init(uint8_t address) {
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i2c_address = address;
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#ifdef I2C_MASTER_MODE
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#ifdef I2C_ENABLE_PULLUPS
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I2C_DDR &= ~((1 << I2C_SCL_PIN) | (1 << I2C_SDA_PIN));
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I2C_PORT |= (1 << I2C_SCL_PIN) | (1 << I2C_SDA_PIN);
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#endif /* I2C_ENABLE_PULLUPS */
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/**
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TWI Bit Rate register
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SCL_freq = CPU_freq / (16 + 2 * TWBR)
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See: page 235 of atmega328 datasheet.
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*/
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TWBR = ((F_CPU / I2C_BITRATE) - 16) / 2;
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/**
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TWI Status Register
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Lower two bits set the prescaler value.
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See: page 236 of atmega328 datasheet.
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*/
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TWSR = 0x00;
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#endif /* I2C_MASTER_MODE */
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#ifdef I2C_SLAVE_MODE
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TWAR = i2c_address; // We listen to broadcasts if lowest bit is set.
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TWCR = (0<<TWINT)|(0<<TWEA)|(0<<TWSTA)|(0<<TWSTO)|(1<<TWEN)|(1<<TWIE);
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#endif
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}
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static void i2c_send_handler(void) {
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i2c_state = I2C_MODE_SAWP; // Just send.
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// Start transmission.
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TWCR = (1<<TWINT)|(0<<TWEA)|(1<<TWSTA)|(0<<TWSTO)|(1<<TWEN)|(1<<TWIE);
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i2c_state |= I2C_MODE_BUSY;
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}
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/**
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Function sends a data block to slave device.
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*/
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void i2c_send(uint8_t address, uint8_t* block, uint8_t tx_len) {
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i2c_address = address;
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i2c_buffer = block;
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i2c_index = 0;
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i2c_byte_count = tx_len;
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i2c_send_handler();
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}
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/**
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This is the interrupt for all the I2C things.
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A few words about TWCR bits:
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Bit 7 (TWINT) is used to run TWI.
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Bit 6 (TWEA) is used to send ACK (if set) in cases of
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a) device's own slave address has been received;
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b) general call has been received;
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c) a data byte has been received.
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Bit 5 (TWSTA) is 1 if app wants to be a master, don't forget to
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clear this bit.
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Bit 4 (TWSTO) is generated STOP in master mode if set (cleared
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automaticly), recovered from error condition in slave
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mode if set.
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Bit 3 (TWWC) is write collision flag. Sets on try to writeto TWDR when
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TWINT is low.
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Bit 2 (TWEN) activates SDA/SCL pins if set. Set to 0 to disable TWI.
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Bit 1 (Reserved).
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Bit 0 (TWIE) enables TWI interrupt.
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*/
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ISR(TWI_vect) {
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switch (TWSR & TW_STATUS_MASK) {
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case TW_BUS_ERROR:
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// A hardware error was detected.
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i2c_state |= I2C_ERROR_BUS_FAIL;
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// Send stop condition.
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TWCR = (1<<TWINT)|(I2C_MODE<<TWEA)|(0<<TWSTA)|(1<<TWSTO)|(1<<TWEN)|(0<<TWIE);
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break;
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case TW_START:
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// Start happens, send a target address.
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if ((i2c_state & I2C_MODE_MASK) == I2C_MODE_SARP) {
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i2c_address |= 0x01;
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} else {
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i2c_address &= 0xFE;
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}
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TWDR = i2c_address;
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TWCR = (1<<TWINT)|(I2C_MODE<<TWEA)|(0<<TWSTA)|(0<<TWSTO)|(1<<TWEN)|(1<<TWIE);
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break;
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case TW_REP_START:
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// Start happens, send a target address.
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if ((i2c_state & I2C_MODE_MASK) == I2C_MODE_ENHA) {
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i2c_address |= 0x01;
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} else {
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i2c_address &= 0xFE;
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}
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TWDR = i2c_address;
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TWCR = (1<<TWINT)|(I2C_MODE<<TWEA)|(0<<TWSTA)|(0<<TWSTO)|(1<<TWEN)|(1<<TWIE);
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break;
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case TW_MT_SLA_ACK:
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// SLA+W was sent, then ACK received.
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if ((i2c_state & I2C_MODE_MASK) == I2C_MODE_SAWP) {
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TWDR = i2c_buffer[i2c_index++];
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TWCR = (1<<TWINT)|(I2C_MODE<<TWEA)|(0<<TWSTA)|(0<<TWSTO)|(1<<TWEN)|(1<<TWIE);
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}
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#ifdef I2C_EEPROM_SUPPORT
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if ((i2c_state & I2C_MODE_MASK) == I2C_MODE_ENHA) {
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TWDR = i2c_page_address[i2c_page_index++];
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TWCR = (1<<TWINT)|(I2C_MODE<<TWEA)|(0<<TWSTA)|(0<<TWSTO)|(1<<TWEN)|(1<<TWIE);
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}
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#endif
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break;
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case TW_MT_SLA_NACK:
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// SLA+W was sent, got NACK, so slave is busy or out of bus.
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i2c_state |= I2C_ERROR_NO_ANSWER;
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// Send stop condition.
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TWCR = (1<<TWINT)|(I2C_MODE<<TWEA)|(0<<TWSTA)|(1<<TWSTO)|(1<<TWEN)|(0<<TWIE);
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break;
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case TW_MT_DATA_ACK:
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// A byte was sent, got ACK.
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if ((i2c_state & I2C_MODE_MASK) == I2C_MODE_SAWP) {
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if (i2c_index == i2c_byte_count) {
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// Last byte, send stop condition.
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TWCR = (1<<TWINT)|(I2C_MODE<<TWEA)|(0<<TWSTA)|(1<<TWSTO)|(1<<TWEN)|(0<<TWIE);
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} else {
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// Send the next byte.
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TWDR = i2c_buffer[i2c_index++];
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TWCR = (1<<TWINT)|(I2C_MODE<<TWEA)|(0<<TWSTA)|(0<<TWSTO)|(1<<TWEN)|(1<<TWIE);
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}
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}
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#ifdef I2C_EEPROM_SUPPORT
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if ((i2c_state & I2C_MODE_MASK) == I2C_MODE_ENHA) {
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// It was a page address byte.
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if (i2c_page_index == i2c_page_count) {
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// It was the last byte of the page address.
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TWCR = (1<<TWINT)|(I2C_MODE<<TWEA)|(1<<TWSTA)|(0<<TWSTO)|(1<<TWEN)|(1<<TWIE);
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} else {
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// Send the next page address byte.
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TWDR = i2c_page_address[i2c_page_index++];
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TWCR = (1<<TWINT)|(I2C_MODE<<TWEA)|(0<<TWSTA)|(0<<TWSTO)|(1<<TWEN)|(1<<TWIE);
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}
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}
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#endif
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break;
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case TW_MT_DATA_NACK:
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// Byte was sent but got NACK, there are two possible reasons:
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// - a slave stops transmission and it is ok, or
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// - a slave became crazy.
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i2c_state |= I2C_ERROR_NACK;
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// Send stop condition.
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TWCR = (1<<TWINT)|(I2C_MODE<<TWEA)|(0<<TWSTA)|(1<<TWSTO)|(1<<TWEN)|(0<<TWIE);
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break;
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case TW_MT_ARB_LOST: // Collision, identical to TW_MR_ARB_LOST.
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// It looks like there is another master on the bus.
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i2c_state |= I2C_ERROR_LOW_PRIO;
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// Setup all again.
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i2c_index = 0;
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#ifdef I2C_EEPROM_SUPPORT
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i2c_page_index = 0;
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#endif
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// Try to resend when the bus became free.
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TWCR = (1<<TWINT)|(I2C_MODE<<TWEA)|(1<<TWSTA)|(0<<TWSTO)|(1<<TWEN)|(1<<TWIE);
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break;
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case TW_MR_SLA_ACK:
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// SLA+R was sent, got АСК, then received a byte.
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if (i2c_index + 1 == i2c_byte_count) {
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// Last byte fitting into the buffer. Request a byte, then send NACK
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// to slave and it will release the bus.
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TWCR = (1<<TWINT)|(0<<TWEA)|(0<<TWSTA)|(0<<TWSTO)|(1<<TWEN)|(1<<TWIE);
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} else {
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// Or just receive a byte and sent ACK.
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TWCR = (1<<TWINT)|(1<<TWEA)|(0<<TWSTA)|(0<<TWSTO)|(1<<TWEN)|(1<<TWIE);
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}
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break;
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case TW_MR_SLA_NACK:
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// SLA+R was sent, got NАСК, it seems the slave is busy.
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i2c_state |= I2C_ERROR_NO_ANSWER;
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// Send stop condition.
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TWCR = (1<<TWINT)|(I2C_MODE<<TWEA)|(0<<TWSTA)|(1<<TWSTO)|(1<<TWEN)|(0<<TWIE);
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break;
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case TW_MR_DATA_ACK:
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i2c_buffer[i2c_index++] = TWDR;
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// TODO: Add BUFFER OVERFLOW check.
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if (i2c_index + 1 == i2c_byte_count) {
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// Last byte wait the processing.
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TWCR = (1<<TWINT)|(0<<TWEA)|(0<<TWSTA)|(0<<TWSTO)|(1<<TWEN)|(1<<TWIE);
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} else {
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// Request the next byte.
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TWCR = (1<<TWINT)|(0<<TWEA)|(0<<TWSTA)|(0<<TWSTO)|(1<<TWEN)|(1<<TWIE);
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}
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break;
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case TW_MR_DATA_NACK:
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// Last byte received, send NACK to make the slave to release the bus.
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i2c_buffer[i2c_index] = TWDR;
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// Send stop condition.
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TWCR = (1<<TWINT)|(I2C_MODE<<TWEA)|(0<<TWSTA)|(1<<TWSTO)|(1<<TWEN)|(0<<TWIE);
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break;
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#ifdef I2C_SLAVE_MODE
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case TW_SR_ARB_LOST_SLA_ACK:
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case TW_SR_ARB_LOST_GCALL_ACK:
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// Another master on the bus sent some bytes, receive them.
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i2c_state |= I2C_ERROR_LOW_PRIO;
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// Restore the transfer.
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i2c_index = 0;
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#ifdef I2C_EEPROM_SUPPORT
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i2c_page_index = 0;
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#endif
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case TW_SR_SLA_ACK:
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case TW_SR_GCALL_ACK:
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i2c_state |= I2C_MODE_BUSY; // Lock bus.
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i2c_index = 0;
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if (I2C_SLAVE_RX_BUFFER_SIZE == 1) {
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// We should take alone byte and send NACK.
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TWCR = (1<<TWINT)|(0<TWEA)|(0<<TWSTA)|(0<<TWSTO)|(1<<TWEN)|(1<<TWIE);
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} else {
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// Get a byte and send ACK.
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TWCR = (1<<TWINT)|(1<TWEA)|(0<<TWSTA)|(0<<TWSTO)|(1<<TWEN)|(1<<TWIE);
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}
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break;
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case TW_SR_DATA_ACK:
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case TW_SR_GCALL_DATA_ACK:
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i2c_in_buffer[i2c_index++] = TWDR;
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if (i2c_index == I2C_SLAVE_RX_BUFFER_SIZE - 1) {
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// Room for only one byte left, send NACK.
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TWCR = (1<<TWINT)|(0<TWEA)|(0<<TWSTA)|(0<<TWSTO)|(1<<TWEN)|(1<<TWIE);
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} else {
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// We have room for more bytes, send ACK.
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TWCR = (1<<TWINT)|(1<TWEA)|(0<<TWSTA)|(0<<TWSTO)|(1<<TWEN)|(1<<TWIE);
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}
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break;
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case TW_SR_DATA_NACK:
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case TW_SR_GCALL_DATA_NACK:
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i2c_in_buffer[i2c_index] = TWDR;
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// Send stop condition.
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TWCR = (1<<TWINT)|(I2C_MODE<<TWEA)|(0<<TWSTA)|(1<<TWSTO)|(1<<TWEN)|(0<<TWIE);
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break;
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case TW_SR_STOP:
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// We got a Restart. What we will do?
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// Here we can do additional logic but we don't need it at this time.
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// Just ignore it now.
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TWCR = (1<<TWINT)|(1<TWEA)|(0<<TWSTA)|(0<<TWSTO)|(1<<TWEN)|(1<<TWIE);
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break;
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case TW_ST_ARB_LOST_SLA_ACK:
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// Got own address on read from another master.
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i2c_state |= I2C_ERROR_LOW_PRIO | I2C_INTERRUPTED;
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// Reinit.
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i2c_index = 0;
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#ifdef I2C_EEPROM_SUPPORT
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i2c_page_index = 0;
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#endif
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case TW_ST_SLA_ACK:
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// We have got own address on read.
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i2c_index = 0;
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TWDR = i2c_out_buffer[i2c_index];
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if (I2C_SLAVE_TX_BUFFER_SIZE == 1) {
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// If it is last byte, we hope to receive NACK.
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TWCR = (1<<TWINT)|(0<TWEA)|(0<<TWSTA)|(0<<TWSTO)|(1<<TWEN)|(1<<TWIE);
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} else {
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// Wait for ACK.
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TWCR = (1<<TWINT)|(1<TWEA)|(0<<TWSTA)|(0<<TWSTO)|(1<<TWEN)|(1<<TWIE);
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}
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break;
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case TW_ST_DATA_ACK:
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// Send byte and got ACK, then send next byte to master.
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TWDR = i2c_out_buffer[++i2c_index];
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if (I2C_SLAVE_TX_BUFFER_SIZE - 1 == i2c_index) {
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// It was last byte, send it and wait for NACK.
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TWCR = (1<<TWINT)|(0<TWEA)|(0<<TWSTA)|(0<<TWSTO)|(1<<TWEN)|(1<<TWIE);
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} else {
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// Send byte and wait for ACK.
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TWCR = (1<<TWINT)|(1<TWEA)|(0<<TWSTA)|(0<<TWSTO)|(0<<TWEN)|(1<<TWIE);
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}
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break;
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case TW_ST_DATA_NACK:
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// We sent the last byte and received NACK or ACK (doesn't matter here).
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if (i2c_state & I2C_INTERRUPTED) {
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// There was interrupted master transfer.
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i2c_state &= I2C_NOINTERRUPTED;
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// Generate start as the bus became free.
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TWCR = (1<<TWINT)|(1<TWEA)|(1<<TWSTA)|(0<<TWSTO)|(1<<TWEN)|(1<<TWIE);
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} else {
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// Send stop condition.
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TWCR = (1<<TWINT)|(I2C_MODE<<TWEA)|(0<<TWSTA)|(1<<TWSTO)|(1<<TWEN)|(0<<TWIE);
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}
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break;
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#endif /* I2C_SLAVE_MODE */
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default:
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break;
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}
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}
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#endif /* I2C */
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