226 lines
9.2 KiB
ArmAsm
226 lines
9.2 KiB
ArmAsm
/* File: startup_ARMCM0.S
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* Purpose: startup file for Cortex-M0 devices. Should use with
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* GCC for ARM Embedded Processors
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* Version: V1.2
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* Date: 15 Nov 2011
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*
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* Copyright (c) 2011, ARM Limited
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* All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions are met:
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* Redistributions of source code must retain the above copyright
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notice, this list of conditions and the following disclaimer.
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* Redistributions in binary form must reproduce the above copyright
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notice, this list of conditions and the following disclaimer in the
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documentation and/or other materials provided with the distribution.
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* Neither the name of the ARM Limited nor the
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names of its contributors may be used to endorse or promote products
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derived from this software without specific prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND
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* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
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* WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
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* DISCLAIMED. IN NO EVENT SHALL ARM LIMITED BE LIABLE FOR ANY
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* DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
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* (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
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* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
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* ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
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* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
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* SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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*/
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/*
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Copied in spring 2015 from https://github.com/mbedmicro/mbed, file
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mbed/libraries/mbed/targets/cmsis/TARGET_NXP/TARGET_LPC11XX_11CXX/
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TOOLCHAIN_GCC_ARM/startup_LPC11xx.s
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Changes for Teacup:
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- (None)
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*/
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.syntax unified
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.arch armv6-m
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/* Memory Model
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The HEAP starts at the end of the DATA section and grows upward.
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The STACK starts at the end of the RAM and grows downward.
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The HEAP and stack STACK are only checked at compile time:
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(DATA_SIZE + HEAP_SIZE + STACK_SIZE) < RAM_SIZE
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This is just a check for the bare minimum for the Heap+Stack area before
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aborting compilation, it is not the run time limit:
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Heap_Size + Stack_Size = 0x80 + 0x80 = 0x100
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*/
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.section .stack
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.align 3
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#ifdef __STACK_SIZE
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.equ Stack_Size, __STACK_SIZE
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#else
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.equ Stack_Size, 0x80
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#endif
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.globl __StackTop
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.globl __StackLimit
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__StackLimit:
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.space Stack_Size
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.size __StackLimit, . - __StackLimit
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__StackTop:
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.size __StackTop, . - __StackTop
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.section .heap
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.align 3
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#ifdef __HEAP_SIZE
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.equ Heap_Size, __HEAP_SIZE
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#else
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.equ Heap_Size, 0x80
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#endif
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.globl __HeapBase
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.globl __HeapLimit
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__HeapBase:
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.space Heap_Size
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.size __HeapBase, . - __HeapBase
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__HeapLimit:
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.size __HeapLimit, . - __HeapLimit
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.section .isr_vector
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.align 2
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.globl __isr_vector
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__isr_vector:
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.long __StackTop /* Top of Stack */
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.long Reset_Handler /* Reset Handler */
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.long NMI_Handler /* NMI Handler */
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.long HardFault_Handler /* Hard Fault Handler */
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.long 0 /* Reserved */
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.long 0 /* Reserved */
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.long 0 /* Reserved */
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.long 0 /* Reserved */
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.long 0 /* Reserved */
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.long 0 /* Reserved */
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.long 0 /* Reserved */
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.long SVC_Handler /* SVCall Handler */
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.long 0 /* Reserved */
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.long 0 /* Reserved */
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.long PendSV_Handler /* PendSV Handler */
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.long SysTick_Handler /* SysTick Handler */
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/* LPC11xx interrupts */
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.long WAKEUP_IRQHandler /* 16 0 Wake-up on pin PIO0_0 */
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.long WAKEUP_IRQHandler /* 17 1 Wake-up on pin PIO0_1 */
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.long WAKEUP_IRQHandler /* 18 2 Wake-up on pin PIO0_2 */
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.long WAKEUP_IRQHandler /* 19 3 Wake-up on pin PIO0_3 */
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.long WAKEUP_IRQHandler /* 20 4 Wake-up on pin PIO0_4 */
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.long WAKEUP_IRQHandler /* 21 5 Wake-up on pin PIO0_5 */
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.long WAKEUP_IRQHandler /* 22 6 Wake-up on pin PIO0_6 */
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.long WAKEUP_IRQHandler /* 23 7 Wake-up on pin PIO0_7 */
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.long WAKEUP_IRQHandler /* 24 8 Wake-up on pin PIO0_8 */
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.long WAKEUP_IRQHandler /* 25 9 Wake-up on pin PIO0_9 */
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.long WAKEUP_IRQHandler /* 26 10 Wake-up on pin PIO0_10 */
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.long WAKEUP_IRQHandler /* 27 11 Wake-up on pin PIO0_11 */
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.long WAKEUP_IRQHandler /* 28 12 Wake-up on pin PIO1_0 */
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.long Default_Handler /* 29 13 */
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.long SSP1_IRQHandler /* 30 14 SSP1 */
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.long I2C_IRQHandler /* 31 15 I2C0 SI (state change) */
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.long TIMER16_0_IRQHandler /* 32 16 CT16B0 16 bit timer 0 */
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.long TIMER16_1_IRQHandler /* 33 17 CT16B1 16 bit timer 1 */
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.long TIMER32_0_IRQHandler /* 34 18 CT32B0 32 bit timer 0 */
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.long TIMER32_1_IRQHandler /* 35 19 CT32B1 32 bit timer 1 */
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.long SSP0_IRQHandler /* 36 20 SSP */
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.long UART_IRQHandler /* 37 21 UART */
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.long Default_Handler /* 38 22 */
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.long Default_Handler /* 39 23 */
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.long ADC_IRQHandler /* 40 24 ADC end of conversion */
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.long WDT_IRQHandler /* 41 25 Watchdog interrupt (WDINT) */
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.long BOD_IRQHandler /* 42 26 BOD Brown-out detect */
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.long Default_Handler /* 43 27 */
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.long PIOINT3_IRQHandler /* 44 28 PIO_3 GPIO interrupt status of port 3 */
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.long PIOINT2_IRQHandler /* 45 29 PIO_2 GPIO interrupt status of port 2 */
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.long PIOINT1_IRQHandler /* 46 30 PIO_1 GPIO interrupt status of port 1 */
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.long PIOINT0_IRQHandler /* 47 31 PIO_0 GPIO interrupt status of port 0 */
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.size __isr_vector, . - __isr_vector
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.section .text.Reset_Handler
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.thumb
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.thumb_func
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.align 2
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.globl Reset_Handler
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.type Reset_Handler, %function
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Reset_Handler:
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/* Loop to copy data from read only memory to RAM. The ranges
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* of copy from/to are specified by following symbols evaluated in
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* linker script.
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* __etext: End of code section, i.e., begin of data sections to copy from.
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* __data_start__/__data_end__: RAM address range that data should be
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* copied to. Both must be aligned to 4 bytes boundary. */
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ldr r1, =__etext
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ldr r2, =__data_start__
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ldr r3, =__data_end__
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subs r3, r2
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ble .Lflash_to_ram_loop_end
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movs r4, 0
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.Lflash_to_ram_loop:
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ldr r0, [r1,r4]
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str r0, [r2,r4]
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adds r4, 4
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cmp r4, r3
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blt .Lflash_to_ram_loop
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.Lflash_to_ram_loop_end:
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ldr r0, =SystemInit
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blx r0
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ldr r0, =_start
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bx r0
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.pool
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.size Reset_Handler, . - Reset_Handler
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.text
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/* Macro to define default handlers. Default handler
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* will be weak symbol and just dead loops. They can be
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* overwritten by other handlers */
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.macro def_default_handler handler_name
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.align 1
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.thumb_func
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.weak \handler_name
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.type \handler_name, %function
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\handler_name :
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b .
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.size \handler_name, . - \handler_name
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.endm
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def_default_handler NMI_Handler
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def_default_handler HardFault_Handler
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def_default_handler SVC_Handler
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def_default_handler PendSV_Handler
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def_default_handler SysTick_Handler
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def_default_handler Default_Handler
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.macro def_irq_default_handler handler_name
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.weak \handler_name
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.set \handler_name, Default_Handler
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.endm
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def_irq_default_handler WAKEUP_IRQHandler
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def_irq_default_handler SSP1_IRQHandler
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def_irq_default_handler I2C_IRQHandler
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def_irq_default_handler TIMER16_0_IRQHandler
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def_irq_default_handler TIMER16_1_IRQHandler
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def_irq_default_handler TIMER32_0_IRQHandler
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def_irq_default_handler TIMER32_1_IRQHandler
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def_irq_default_handler SSP0_IRQHandler
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def_irq_default_handler UART_IRQHandler
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def_irq_default_handler ADC_IRQHandler
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def_irq_default_handler WDT_IRQHandler
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def_irq_default_handler BOD_IRQHandler
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def_irq_default_handler PIOINT3_IRQHandler
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def_irq_default_handler PIOINT2_IRQHandler
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def_irq_default_handler PIOINT1_IRQHandler
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def_irq_default_handler PIOINT0_IRQHandler
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def_irq_default_handler DEF_IRQHandler
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.end
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