184 lines
3.4 KiB
C
184 lines
3.4 KiB
C
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/** \file
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\brief MCU pin mappings.
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Here we map the pins required by Teacup to the names known by CMSIS.
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*/
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/** I/O pins.
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In MBED, I/O pin handling is rather complicated. Lots of enums, lots of
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functions, spread over various files, slow execution (pin toggling about
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15 times slower than what we have here).
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FASTIO by setting the BSRR (bit set/reset register),
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- Bit0-15 to set
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- Bit16-31 to reset.
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Pins set for Nucleo F411RE, for other STM32F4-boards you need to add them.
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*/
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#include "mbed-stm32f4xx.h"
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/** Pins for UART, the serial port.
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*/
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#define RXD_PORT PIOA_3_PORT
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#define RXD_PIN PIOA_3_PIN
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#define TXD_PORT PIOA_2_PORT
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#define TXD_PIN PIOA_2_PIN
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/**
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We define only pins available on the Nucleo F411RE here.
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Use alphas for PORT and numerics for PIN, close to the design.
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*/
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#define PA_0_PIN 0
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#define PA_0_PORT GPIOA
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#define PA_1_PIN 1
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#define PA_1_PORT GPIOA
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#define PA_2_PIN 2
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#define PA_2_PORT GPIOA
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#define PA_3_PIN 3
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#define PA_3_PORT GPIOA
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#define PA_4_PIN 4
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#define PA_4_PORT GPIOA
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#define PA_5_PIN 5
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#define PA_5_PORT GPIOA
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#define PA_6_PIN 6
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#define PA_6_PORT GPIOA
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#define PA_7_PIN 7
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#define PA_7_PORT GPIOA
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#define PA_8_PIN 8
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#define PA_8_PORT GPIOA
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#define PA_9_PIN 9
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#define PA_9_PORT GPIOA
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#define PA_10_PIN 10
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#define PA_10_PORT GPIOA
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#define PA_11_PIN 11
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#define PA_11_PORT GPIOA
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#define PA_12_PIN 12
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#define PA_12_PORT GPIOA
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#define PA_13_PIN 13
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#define PA_13_PORT GPIOA
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#define PA_14_PIN 14
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#define PA_14_PORT GPIOA
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#define PA_15_PIN 15
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#define PA_15_PORT GPIOA
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#define PB_0_PIN 0
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#define PB_0_PORT GPIOB
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#define PB_1_PIN 1
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#define PB_1_PORT GPIOB
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#define PB_2_PIN 2
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#define PB_2_PORT GPIOB
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#define PB_3_PIN 3
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#define PB_3_PORT GPIOB
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#define PB_4_PIN 4
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#define PB_4_PORT GPIOB
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#define PB_5_PIN 5
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#define PB_5_PORT GPIOB
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#define PB_6_PIN 6
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#define PB_6_PORT GPIOB
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#define PB_7_PIN 7
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#define PB_7_PORT GPIOB
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#define PB_8_PIN 8
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#define PB_8_PORT GPIOB
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#define PB_9_PIN 9
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#define PB_9_PORT GPIOB
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#define PB_10_PIN 10
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#define PB_10_PORT GPIOB
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#define PB_12_PIN 12
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#define PB_12_PORT GPIOB
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#define PB_13_PIN 13
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#define PB_13_PORT GPIOB
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#define PB_14_PIN 14
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#define PB_14_PORT GPIOB
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#define PB_15_PIN 15
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#define PB_15_PORT GPIOB
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#define PC_0_PIN 0
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#define PC_0_PORT GPIOC
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#define PC_1_PIN 1
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#define PC_1_PORT GPIOC
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#define PC_2_PIN 2
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#define PC_2_PORT GPIOC
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#define PC_3_PIN 3
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#define PC_3_PORT GPIOC
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#define PC_4_PIN 4
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#define PC_4_PORT GPIOC
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#define PC_5_PIN 5
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#define PC_5_PORT GPIOC
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#define PC_6_PIN 6
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#define PC_6_PORT GPIOC
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#define PC_7_PIN 7
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#define PC_7_PORT GPIOC
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#define PC_8_PIN 8
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#define PC_8_PORT GPIOC
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#define PC_9_PIN 9
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#define PC_9_PORT GPIOC
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#define PC_10_PIN 10
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#define PC_10_PORT GPIOC
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#define PC_11_PIN 11
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#define PC_11_PORT GPIOC
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#define PC_12_PIN 12
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#define PC_12_PORT GPIOC
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#define PC_13_PIN 13
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#define PC_13_PORT GPIOC
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#define PC_14_PIN 14
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#define PC_14_PORT GPIOC
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#define PC_15_PIN 15
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#define PC_15_PORT GPIOC
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#define PD_2_PIN 2
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#define PD_2_PORT GPIOD
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#define PH_0_PIN 0
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#define PH_0_PORT GPIOH
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#define PH_1_PIN 1
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#define PH_1_PORT GPIOH
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